【产通社，10月13日讯】联华电子消息，其与全球半导体设计制造软件暨IP领导厂商——新思科技(Synopsys)已扩展伙伴关系，将于联华电子28nm HLP Poly SiON制程平台上开发新思科技的DesignWare IP。延续之前在联华电子40nm与55nm制程的成功经验，新思科技将会于联华电子28nm HLP Poly SiON制程上，导入其经验证的DesignWare嵌入式内存，以及逻辑组件数据库。此次合作将芯片设计公司得以在较低的风险下，设计出高速低功耗的系统单芯片，并取得更快的产品上市时程。两家公司长久以来的合作，涵跨了联华电子0.18微米至28nm制程，而成功研发出的高质量DesignWare IP，正是这份稳固合作关系下的丰硕成果。

联华电子的28nm HLP制程除了保留传统Poly SiON技术的成本竞争力，更采用了创新的制程技术，具备绝佳的性价比，与业界其他28nm Poly SiON制程相比较，大幅提升了效能与功耗表现。此一强化的28nm Poly SiON制程，提供芯片设计者由40nm制程到28nm制程更顺畅的移转路径，使芯片设计能够轻易地导入制程并且快速上市。

“联华电子与新思科技已在多个制程世代上，紧密配合了许多年，”联华电子负责客户工程暨硅智财研发设计支持的简山杰副总表示，“新思科技是值得信赖的硅智财领导厂商，我们与新思科技在28nm上继续携手，意味着双方在协助客户发展尖端系统单芯片设计上的共同承诺。联华电子十分期待与我们的客户共同将这些新世代产品推出上市。”

新思科技广泛的产品组合，包含了经速度，功耗与位面积优化，并经过10亿颗以上芯片验证的嵌入式内存与标准组件数据库。DesignWare嵌入式内存与逻辑组件数据库包括了先进的电源管理功能，例如浅待机，深待机与关机，还有一个电源优化套件，藉以延长手持式应用产品的电池寿命。此外，新思科技整合型STAR Memory System测试与修复解决方案，可让芯片设计公司达到更高测试质量与嵌入式内存良率，同时降低芯片面积。

“新思科技与晶圆专工领导者联华电子此次携手合作，将使双方客户得以采用联华电子28nm制程验证过的硅智财，用来差异化其系统单芯片的设计。”新思科技硅智财与系统营销副总经理John Koeter表示。“我们在提供先进制程的高质量硅智财上，有着丰富经验与纪录，因此能给予芯片设计公司信心，在整合DesisnWare IP到系统单芯片设计时，可降低风险，并可望达成首次试产即成功之目标。”

支持联华电子28nm HLP制程的新思科技DesignWare嵌入式内存与逻辑组件数据库，预计于2012年第二季推出。新思科技的晶圆专工硅智财支持项目中的部分内容，包含了于联华电子28nmHLP制程平台上，免费提供嵌入式内存与逻辑组件数据库给合乎资格的获授权者使用。

联华电子的28nm Poly SiON技术现已在客户产品试产中，并可接受客户design-in。查询进一步信息，请访问http://www.umc.com。

About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and Verification IP for widely used protocols, analog IP, embedded memories, logic libraries and ARC™ processor cores. In addition, Synopsys offers SystemC™ transaction-level models to build virtual prototypes for rapid, pre-silicon development of software. With a robust IP development methodology, reuse tools, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip.

About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Forward Looking Statements
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statementsregarding the reduced risk, improved time to market, higher test quality and yield, lower chip area, and dates of delivery of embedded memories and logic libraries, and the DesignWare  USB 3.0, USB 2.0, DDR3/2, and PCI Express 2.0 PHYs. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, unforeseen production or delivery delays, failure to perform as expected, and other risks detailed in Synopsys’ filings with the U.S. Securities and Exchange Commission, including those described in the “Risk Factors” section of the latest Quarterly Report on Form 10-Q for the fiscal quarter ended April 30, 2011.